TEST COVERAGE ASSURANCE OF FPGA DESIGN WITH FUNCTIONAL SAFETY ASSESSMENT ACCORDING TO SIL3 CRITERIA
V.V. Sklyar, A.A. Rezunenko, O.N. Odarushchenko, A.S. Gudz, S.S. Shcherbachenko, A.A. Senatorov, E.D. Vovk
Verification questions of electronic designs for FPGA are considered in case of estimation of the functional safety by criteria of SIL3. Approach to assurance of a test coverage for the digital device with the memory, based on the formal model of statements and directed on reduction of quantity of input test combinations is offered. The method of automated formation of verification reports for the purpose of abbreviation of testing time and increase in accuracy of results is also developed.
verification, test coverage, functional safety, safety criteria
"Obespechenye testovoho pokrыtyia dlia эlektronnыkh proektov FPGA pry otsenyvanyy funktsyonalnoi bezopasnosty po kryteryiam SIL3" ,
Information Processing Systems,