The methods of power saving for FPGA designs are analysed. A conception of "green" programmable logic for FPGA designs and an examples of its implementation by use of irredundant and redundant fault-tolerant basis are suggested. Techniques of development power effective FPGA-oriented logic are researched. These techniques are based on the SW-HW codesign of Boolean functions and automata and functions reallocation between logic blocks for such implementations taking into account requirements to tolerating of soft faults caused by reducing of power consumption.
green programmable logic, FPGA, configurable logic block. logic element, Look Up Table – LUT, faulttolerance