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  5. MINIMIZATION OF TOPOLOGICAL PATH LENGTH OF SIGNALS PASSING TROUGH THE PROCESSORS MATRIX IN THE PROCESS OF BOOLEAN EQUATIONS SYSTEM LOCATION AT PROGRAMMABLE UNLIMITED SYSTEMS

MINIMIZATION OF TOPOLOGICAL PATH LENGTH OF SIGNALS PASSING TROUGH THE PROCESSORS MATRIX IN THE PROCESS OF BOOLEAN EQUATIONS SYSTEM LOCATION AT PROGRAMMABLE UNLIMITED SYSTEMS

N.T. Protsai
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In the article is proposed a method solution of the problem minimization length topological tract of signals passing from the processors matrix location boolean equations system at programmable unlimited systems. This method is useful, when it is need to use maximally parallel and conveyor operating modes of multiprocessor to get solution of the problem in the shortest possible time. There are topology and mathematical models of processor structure. Dignities and shortcomings of method are analyzed. There are outlined perspectives of discovery at this direction.
Keywords: multiprocessor, sequencer, Programmable Unlimited Systems, planar structure, wave algorithm, Boolean equations system, graph, minimization of path in the graph